1. Charge-pump phase-lock loops;Gardner;IEEE Trans. Commun.,1980
2. Design of high-performance cmos charge pumps in phase-locked loops;Rhee,1999
3. Design of CMOS Phase-Locked Loops: from Circuit Level to Architecture Level;Razavi,2020
4. Architectures and design considerations of cmos charge pumps for phase-locked loops;El-Hage,2003
5. Low-spur, low-phase-noise clock multiplier based on a combination of PLL and recirculating DLL with dual-pulse ring oscillator and self-correcting charge pump;Gierkink;IEEE J. Solid State Circ.,2008