Area-efficient high-speed 3D DWT processor architecture
Author:
Publisher
Institution of Engineering and Technology (IET)
Subject
Electrical and Electronic Engineering
Link
https://digital-library.theiet.org/content/journals/10.1049/el_20070201?crawler=true&mimetype=application/pdf
Reference10 articles.
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4. A comparison of hardware implementations of the biorthogonal 9/7 DWT: convolution versus lifting
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5. FPGA Implementation of 3D Discrete Wavelet Transform for Real-Time Medical Imaging;2007 18th European Conference on Circuit Theory and Design;2007-08
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