DICA: destination intensity and congestion‐aware output selection strategy for network‐on‐chip systems-Reference-Cited by-同舟云学术

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DICA: destination intensity and congestion‐aware output selection strategy for network‐on‐chip systems

Published:2019-04-15 Issue:4 Volume:13 Page:335-347
ISSN:1751-8601
Container-title:IET Computers & Digital Techniques
language:en
Short-container-title:IET Computers & Digital Techniques

Author:

Mehranzadeh Amin¹,Khademzadeh Ahmad²,Bagherzadeh Nader³,Reshadi Midia¹

Affiliation:

1. Department of Computer Engineering, Science and Research BranchIslamic Azad UniversityTehranIran

2. Iran Telecommunication Research CenterTehranIran

3. Department of Electrical Engineering and Computer ScienceUniversity of California IrvineIrvineCAUSA

Publisher

Institution of Engineering and Technology (IET)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Link

https://onlinelibrary.wiley.com/doi/pdf/10.1049/iet-cdt.2018.5154

Reference45 articles.

1. Benini L. De Micheli G.: ‘Powering networks on chips: energy‐efficient and reliable interconnect design for socs’.Proc. of the 14th Int. Symp. on Systems Synthesis ACM New York NY USA 2001 pp.33–38

2. Networks on Chip

3. Outstanding research problems in NoC design: system, microarchitecture, and circuit perspectives;Marculescu R.;IEEE Trans. Comput.‐Aided Des. Integr. Circuits Syst.,2009

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