Coarse‐grained reconfiguration: dataflow‐based power management

Author:

Palumbo Francesca1,Sau Carlo2,Raffo Luigi2

Affiliation:

1. PolComIng – Information Engineering UnitUniversity of SassariSassariItaly

2. DIEE – Department of Electronics EngineeringUniversity of CagliariCagliariItaly

Publisher

Institution of Engineering and Technology (IET)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Cited by 8 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. FPGA-Based Partial Crypto-Reconfiguration of Nodes for WSN;Information and Communication Technology for Sustainable Development;2017-11-08

2. Hardware design methodology using lightweight dataflow and its integration with low power techniques;Journal of Systems Architecture;2017-08

3. Power Modeling and Exploration of Dynamic and Partially Reconfigurable Systems;Journal of Low Power Electronics;2016-09-01

4. Power and clock gating modelling in coarse grained reconfigurable systems;Proceedings of the ACM International Conference on Computing Frontiers;2016-05-16

5. Prototyping real-time tracking systems on mobile devices;Proceedings of the ACM International Conference on Computing Frontiers;2016-05-16

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