Comparative analysis of network‐on‐chip simulation tools-Reference-Cited by-同舟云学术

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Comparative analysis of network‐on‐chip simulation tools

Published:2017-12-05 Issue:1 Volume:12 Page:30-38
ISSN:1751-8601
Container-title:IET Computers & Digital Techniques
language:en
Short-container-title:IET Computers & Digital Techniques

Author:

Khan Sarzamin¹,Anjum Sheraz²,Gulzari Usman Ali³,Torres Frank Sill⁴

Affiliation:

1. Department of Electrical EngineeringCOMSATS Institute of Information TechnologyWah CanttPakistan

2. Department of Computer ScienceCOMSATS Institute of Information TechnologyWah CanttPakistan

3. Department of Electrical EngineeringCOMSATS Institute of Information TechnologyIslamabadPakistan

4. Department of Electronic EngineeringFederal University of Minas GeraisBelo HorizonteBrazil

Publisher

Institution of Engineering and Technology (IET)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Link

https://onlinelibrary.wiley.com/doi/pdf/10.1049/iet-cdt.2017.0068

Reference50 articles.

1. Networks on chips: a new SoC paradigm

2. Dally W.J. Towels B.: ‘Route packets not wires on‐chip interconnection networks’.Proc. 38th DAC 2001 pp.684–689

3. Network‐on‐chip: a new SoC communication infrastructure paradigm;Choudhary N.;Int. J. Soft Comput. Eng.,2012

4. Mineo C. Davis W.R.: ‘The benefits of 3D networks‐on‐chip as shown with LDPC decoding’.IEEE Int. Conf. 3D System Integration 2009. 3DIC2009 pp.1–8

5. Networks on Chip

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