Dynamic scheduling in RISC architectures-Reference-Cited by-同舟云学术

Dynamic scheduling in RISC architectures

Published:1996 Issue:5 Volume:143 Page:309
ISSN:1350-2387
Container-title:IEE Proceedings - Computers and Digital Techniques
language:en
Short-container-title:IEE Proc., Comput. Digit. Tech.

Author:

Bolychevsky A.,Jesshope C.R.,Muchnick V.B.

Publisher

Institution of Engineering and Technology (IET)

Subject

Computational Theory and Mathematics,Hardware and Architecture,Theoretical Computer Science

Link

https://digital-library.theiet.org/content/journals/10.1049/ip-cdt_19960788?crawler=true&mimetype=application/pdf

Reference21 articles.

1. ‘Uniform random traffic in massively-parallel data-driven computer’, Technical report, CSRG95-12, University of Surrey Department of EE Engineering, 1995

2. ‘The fundamental issues and construction of a data-parallel dataflow computer’, Technical report, CSRG95-01, University of Surrey Department of EE Engineering, 1995

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