4.2 GHz 0.81 mW triple‐modulus prescaler based on true single‐phase clock
Author:
Affiliation:
1. Shenzhen Institutes of Advanced Technology, Chinese Academy of ScienceShenzhen518055China
2. University of Chinese Academy of SciencesBeijingChina
3. Institute of Microelectronics of Chinese Academy of SciencesBeijingChina
Publisher
Institution of Engineering and Technology (IET)
Subject
Electrical and Electronic Engineering
Link
https://onlinelibrary.wiley.com/doi/pdf/10.1049/el.2016.0672
Reference5 articles.
1. A low‐power single‐phase clock multiband flexible divider;Manthena V.K.;IEEE Trans. Very Large Scale Integr. (VLSI) Syst.,2012
2. High‐speed low power true single‐phase clock dual‐modulus prescalers;Chen W.H.;IEEE Trans. Circuits Syst. II, Exp. Briefs,2011
3. A 5.8‐GHz wideband TSPC divide‐by‐16/17 dual modulus prescaler;Zhu W.;IEEE Trans. Very Large Scale Integr. (VLSI) Syst.,2015
4. Dual‐modulus 127/128 FOM enhanced prescaler design in 0.35‐μm CMOS technology;Rana R.S.;IEEE J. Solid‐State Circuits,2005
5. Design and optimization of the extended true single‐phase clock‐based prescaler;Yu X.P.;IEEE Trans. Microw. Theory Tech.,2006
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