Junctionless Π‐gate transistor with indium gallium arsenide channel
Author:
Affiliation:
1. Department of Electrical and Computer EngineeringNational University of SingaporeSingaporeSingapore11757
Publisher
Institution of Engineering and Technology (IET)
Subject
Electrical and Electronic Engineering
Link
https://onlinelibrary.wiley.com/doi/pdf/10.1049/el.2012.4535
Reference8 articles.
1. Lattice-Mismatched $\hbox{In}_{0.4}\hbox{Ga}_{0.6} \hbox{As}$ Source/Drain Stressors With In Situ Doping for Strained $\hbox{In}_{0.53}\hbox{Ga}_{0.47}\hbox{As}$ Channel n-MOSFETs
2. Fabrication of gate stack with high gate work function for implantless enhancement-mode GaAs n-channel metal-oxide-semiconductor field effect transistor applications
3. Nanowire transistors without junctions
4. Sub-10-nm Extremely Thin Body InGaAs-on-Insulator MOSFETs on Si Wafers With Ultrathin $\hbox{Al}_{2}\hbox{O}_{3}$ Buried Oxide Layers
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