Noise power normalisation: extension of gm/ID technique for noise analysis
Author:
Publisher
Institution of Engineering and Technology (IET)
Subject
Electrical and Electronic Engineering
Link
https://digital-library.theiet.org/content/journals/10.1049/el.2011.3730?crawler=true&mimetype=application/pdf
Reference8 articles.
1. A g/sub m//I/sub D/ based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA
2. Improved synthesis of gain-boosted regulated-cascode CMOS stages using symbolic analysis and gm/ID methodology
3. Emerging non-volatile memory technologies for reconfigurable architectures
4. Laker, K.R., and Sansen, W.M.C.: ‘Design of analog integrated circuits and systems’, (McGraw-Hill 1994)
5. Razavi, B.: ‘Design of analog CMOS integrated circuits’, (McGraw-Hill 2002)
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