Safe design for TF-SOI power MOSFETs
Author:
Publisher
Institution of Engineering and Technology (IET)
Subject
Electrical and Electronic Engineering
Link
https://digital-library.theiet.org/content/journals/10.1049/el_20063220?crawler=true&mimetype=application/pdf
Reference6 articles.
1. LDMOS in SOI technology with very-thin silicon film
2. Degradation mechanisms in SOI n-channel LDMOSFETs
3. Analytical model for the surface field distribution of SOI RESURF devices
4. A novel analytical model for the breakdown voltage of thin-film SOI power MOSFETs
5. Threshold voltage model for deep-submicron fully depleted SOI MOSFETs with back gate substrate induced surface potential effects
Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Towards High-Voltage MOSFETs in Ultrathin FDSOI;International Journal of High Speed Electronics and Systems;2016-03
2. Dual Ground Plane EDMOS in 28nm FDSOI for 5V power management applications;Solid-State Electronics;2015-11
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