Formation of submicron T-gate by rapid thermally reflowed resist with metal transfer layer
Author:
Publisher
Institution of Engineering and Technology (IET)
Subject
Electrical and Electronic Engineering
Link
https://digital-library.theiet.org/content/journals/10.1049/el_20010718?crawler=true&mimetype=application/pdf
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4. 0.2-μm fully-self-aligned Y-shaped gate HJFET's with reduced gate-fringing capacitance fabricated using collimated sputtering and electroless Au-plating
5. Williams, R.: ‘Modern GaAs processing methods’, (Artech House Norwood MA 1990), p. 136–137
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