14‐bit 20 μW column‐level two‐step ADC for 640 × 512 IRFPA
Author:
Affiliation:
1. National Key Laboratory of Science and Technology on Micro/Nano FabricationPeking UniversityBeijing100871People's Republic of China
Publisher
Institution of Engineering and Technology (IET)
Subject
Electrical and Electronic Engineering
Link
https://onlinelibrary.wiley.com/doi/pdf/10.1049/el.2015.0491
Reference5 articles.
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3. Digitally calibrated 768‐kS/s 10‐b minimum‐size SAR ADC array with dithering;Xu R.Y.;J. Solid‐State Circuits,2012
4. A dual‐exposure single‐capture wide dynamic range CMOS image sensor with column wise highly/lowly illuminated pixel detection;Yeh S.F.;Trans. Electron Devices,2012
5. 3 mega‐pixel InSb detector with 10 μm pitch;Gershon G.;Proc. SPIE,2013
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