On‐resistance reduction in vertical double diffusion metal oxide semiconductor devices using stress applied by thin film

Author:

Wang GuiLian1,Ding Guifu2,Miao Xiaodan3

Affiliation:

1. School of Electronic and Electrical EngineeringShanghai University of Engineering Science333 Longteng RoadShanghai201620People's Republic of China

2. Country National Key Laboratory of Science and Technology on Micro/Nano FabricationShanghai Jiao Tong UniversityShanghai200240People's Republic of China

3. School of Mechanical EngineeringShanghai University of Engineering Science333 Longteng RoadShanghai201620People's Republic of China

Funder

National Natural Science Foundation of China

Publisher

Institution of Engineering and Technology (IET)

Subject

Condensed Matter Physics,General Materials Science,Biomedical Engineering,Bioengineering

Reference13 articles.

1. On-Resistance Modulation of High Voltage GaN HEMT on Sapphire Substrate Under High Applied Voltage

2. FriedrichsP.MitlehnerH.DohnkeK.O.et al.: ‘SiC power devices with low on‐resistance for fast switching applications’.Power Semiconductor Devices and ICs 2000. Proc. The 12th International Symp. on 2000 pp.213–216

3. Off-state drain breakdown mechanisms of VDMOS with anti-JFET implantation

4. ChenC.LeeT.HouT.et al.: ‘Stress memorization technique (SMT) by selectively strained‐nitride capping for sub‐65 nm high‐performance strained‐Si device application’.VLSI Technology 2004. Digest of Technical Papers. 2004 Symp. on 2004 pp.56–57

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