Optimisation of Reed–Muller PLA implementations
Author:
Publisher
Institution of Engineering and Technology (IET)
Subject
Electrical and Electronic Engineering
Link
https://digital-library.theiet.org/content/journals/10.1049/ip-cds_20020354?crawler=true&mimetype=application/pdf
Reference25 articles.
1. On the complexity of mod-2l sum PLA's
2. Altera APEX II programmable logic device family data sheet, 2001, ver. 1.1
3. Green, D.: ‘Modern logic design’, (Addison-Wesley Publishing Company, Workingham, England 1986)
4. Invited paper. Boolean matrix representation for the conversion of minterms to Reed–Muller coefficients and the minimization of Exclusive-OR switching functions
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