Publisher
Institution of Engineering and Technology (IET)
Subject
Electrical and Electronic Engineering
Reference11 articles.
1. Baker, R.J., Li, H.W., and Boyce, D.E.: ‘CMOS circuit design, layout, and simulation’, (IEEE Press, New York 1997)
2. Forming damped LRC parasitic circuits in simultaneously switched CMOS output buffers
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4. Application specific CMOS output driver circuit design techniques to reduce simultaneous switching noise
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