Design of Low Power High Speed Double Tail Comparator using Power Gating Techniques
-
Published:2019
Issue:
Volume:
Page:
-
ISSN:1556-5068
-
Container-title:SSRN Electronic Journal
-
language:en
-
Short-container-title:SSRN Journal
Author:
Ramarao D.,Rajasekhar K.
Cited by
1 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Design of Adiabatic Logic Two Tail Comparator for Low Power and Analyze with CMOS Comparator;2022 4th International Conference on Advances in Computing, Communication Control and Networking (ICAC3N);2022-12-16