Dynamic Logistic Map Based Spread Spectrum Modulation in Wireless Channels

Author:

Kashyap Katyayani1,Sharma Tarun Kumar1

Affiliation:

1. Amity University, Jaipur, India

Abstract

Generation of an efficient spreading code in Spread Spectrum Modulation (SSM) is always challenging due to considerations like optimum sequence length, physical layout of registers and power requirements. In this article, a design of a dynamic chaotic spreading sequence for application in a Direct Sequence Spread Spectrum (DS SS) based system with the considerations of wireless channels (Rayleigh and Rician) are presented. Generation of dynamic chaotic sequence for application in linear and nonlinear channels is done and a comparison with static chaotic sequence is presented. Evaluation of performance is done in terms of bit error rate (BER), computational time, mutual information and signal power for faded channel taking into considerations of different modulation schemes, which finally dictates the efficiency of the generated code. The performance of the generated dynamic logistic map-based sequence is compared to that obtained from Gold code under equivalent conditions.

Publisher

IGI Global

Subject

General Earth and Planetary Sciences,General Environmental Science

Reference17 articles.

1. Chaotic Sequences for Spread Spectrum: An Alternative to PN – Sequences;G. H.Bateni;IEEE International Conference on Wireless Communications

2. A New Optimal Design Method of Arbitrary Limited Period Spreading Sequences Based on Logistic Mapping

3. New chaotic binary sequences with good correlation property using logistic maps.;C.Fatima;IOSR Journal of Electronics and Communication Engineering,2013

4. Kashyap, K., Sarma, M.P., Sarma, K.K., & Mastorakis, N. (2014). Generation of Orthogonal Logistic Map Sequences for Application in Wireless Channel and Implementation using a Multiplierless Technique. In 5thInternational Conference on Circuits, Systems, Electronics, Control and Signal Processing (CSECS ’14), Salerno, Italy, June 3-5.

5. Design and FPGA Implementation of a Pseudo Random Bit Generator Using Chaotic Maps

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