Affiliation:
1. RWTH Aachen University, Aachen, Germany
2. Synopsys Inc., Leuven, Belgium
Abstract
Spinlocks are a common technique in Multi-Processor Systems-on-Chip (MPSoCs) to protect shared resources and prevent data corruption. Without a priori application knowledge, the control of spinlocks is often highly random which can degrade the system performance significantly. To improve this, a centralized control mechanism for spinlocks is proposed in this paper, which utilizes application-specific information during spinlock control. The complete control flow is presented, which starts from integrating high-level user-defined information down to a low-level realization of the control. An Application-Specific Instruction-set Processor (ASIP) called OSIP, which was originally designed for task scheduling and mapping, is extended to support this mechanism. The case studies demonstrate the high efficiency of the proposed approach and at the same time highlight the efficiency and flexibility advantages of using an ASIP as the system controller in MPSoCs.
Cited by
3 articles.
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1. Interrupt Responsive Spinlock Mechanism Based on MCS for Multi-core RTOS;Parallel Architectures, Algorithms and Programming;2020
2. System-Level Analysis of MPSoCs with a Hardware Scheduler;Advances in Systems Analysis, Software Engineering, and High Performance Computing;2014
3. System-Level Analysis of MPSoCs with a Hardware Scheduler;Leadership and Personnel Management