Bipolar effects in snapback mechanism in advanced n-FET transistors under high current stress conditions

Abstract

Abstract This work models high current snapback behavior in n-FET transistors with bottom body contact under high current stress at the drain for ZRAM (Zero capacitor RAM). We analyze 2D current flow in n-FET near the pinch-off region and relate the results to the S-shaped snapback characteristics under high injection avalanche generated carriers conditions. The role of surface bipolar effects on the first snapback phenomenon in the GG-NMOS (Gate-Grounded NMOS) is investigated. A novel physical insight of the bipolar activity is modeled through current flow and barrier lowering at the source-substrate junctions. Moreover, the coupling of electron and hole injection is described. Finally, a model for surface potential inside the substrate before and after snapback is derived and compared with TCAD simulation results. A very good agreement is observed between the model and the TCAD results.