High Speed Vlsi Architectures Of Fir Filters For Image Applications – A Review

Abstract

Abstract Numerousapplications based on VLSI architectures suffer from large size components that lead to an error at the design stage of floating point arithmetic. Therefore, in the design of a VLSI implementation of FIR filter for various applications such as images increases the design complexity and the time delay effect of the model. This lead tohave difficultyofarchitecturethatincludes the competing requirements like speed, area, and power, application area specialization and knowledge, changing and evolving terms. In this paper, a brief review of VLSI architectures in the field of image processing is depicted such as compression, interpolation, which will be advantageous in order to tackle the issues caused by the complexity in the design and design an optimal architecture with the necessary factors that need to be satisfied.