Study of the impact of interface traps associated with SiN X passivation on AlGaN/GaN MIS-HEMTs

Author:

Baby RijoORCID,Venugopalrao Anirudh,Chandrasekar HareeshORCID,Raghavan Srinivasan,Rangarajan Muralidharan,Nath Digbijoy N

Abstract

Abstract In this work, we show that a bilayer SiN x passivation scheme which includes a high-temperature annealed SiN x as gate dielectric, significantly improves both ON and OFF state performance of AlGaN/GaN metal insulator semiconductor high electron mobility transistors (MISHEMTs). Surface and bulk leakage paths were determined from devices with different SiN x passivation schemes. Temperature-dependent mesa leakage studies showed that the surface conduction could be explained using a 2D variable range hopping mechanism; this is attributed to the mid-gap interface states at the GaN(cap)/SiN x interface generated due to the Ga–Ga metal like bonding states. It was found that the high temperature annealed SiN x gate dielectric exhibited the lowest interface state density and a two-step CV indicative of a superior quality SiN x /GaN interface as confirmed from conductance and capacitance measurements. High-temperature annealing helps form Ga–N bonding states, thus reducing the shallow metal-like interface states. MISHEMT measurements showed a significant reduction in gate leakage and a four-orders of magnitude improvement in the ON/OFF ratio while increasing the saturation drain current (I DS) by a factor of 2. Besides, MISHEMTs with two-step SiN x passivation exhibited a relatively flat transconductance profile, indicating lower interface states density. The dynamic R on with gate and drain stressing measurements also showed about 3× improvements in devices with bilayer SiN x passivation.

Funder

SERB

ISRO

National Nano Fabrication Facility

Micro and Nano Characterization Facility

MSD Lab

Publisher

IOP Publishing

Subject

Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

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