Electrical-performance and reliability improvement of flexible low-temperature polycrystalline silicon thin-film transistors via post-annealing process

Abstract

Abstract We investigated the improvement methods of the electrical characteristics and reliability of flexible low-temperature polycrystalline silicon (LTPS) thin-film transistors (TFTs) by optimizing the annealing process. We investigated the effect of annealing on the device properties via electrical measurement and density-of-state (DOS) analysis. The annealing temperature should be reduced for flexible LTPS TFTs compared to rigid devices because the range of the thermal stability of flexible substrate is narrower than that of the glass substrate. As the activation annealing temperature (T a) decreased, the threshold voltage and field-effect mobility (μ FE) decreased, and the subthreshold swing (SS) increased. When the post-annealing temperature (T pa) decreased, μ FE increased, and the changes in the other parameters were negligible. The DOS decreased with an increase in T a and a reduction in T pa. These results originated from ineffective dopant activation and defect curing due to the lower T a and the enhanced hydrogen defect passivation at the lower T pa. Therefore, flexible LTPS TFTs with reduced T a values exhibited similar μ FE values and lower SS values when the post-annealing process was omitted. Furthermore, removing the post-annealing process improved the reliability of the flexible LTPS TFTs with reduced T a values under electrical stress. According to a hot-carrier instability analysis, defect passivation by hydrogen was more stable than defect curing with a higher T a. Consequently, although T a was low for flexible LTPS TFTs, the electrical performance and reliability could be improved by optimizing the post-annealing process.