A novel double RESURF SOI-LIGBT with dynamic avalanche immunity and low losses

Abstract

Abstract A novel, trench gates, double reduced surface field, lateral insulated gate bipolar transistor based on silicon-on-insulator (SOI-LIGBT) is proposed and investigated. A p-top layer connected to the emitter via two series diodes and n-rings surrounding the bottom of trench gates are used to reduce the on-state voltage drop (V CE(sat)) and turn-off loss (E off). A deep trench with a p-ring is introduced to form a gate-drain shorted positive channel metal oxide semiconductor, which can automatically raise the potential of the p-ring during turn-off so as to enhance the dynamic avalanche immunity. Besides, the deep trench with a p-ring can shield the high electric field from n-rings at the blocking state, which avoids the breakdown of n-rings. Simulation results indicate that the proposed LIGBT can be safely turned off even under a bus voltage equal to the breakdown voltage (V B), and V CE(sat) under E off = 1 mJ cm−2 can be 24% lower than that of the conventional LIGBT.