Review on Radiation Hardness Assurance by Design, Process and NextGen Devices

Abstract

Abstract Aggressive scaling, shrinking device size and exponential rise in device densityover the past two decades has contributed significantly in improving the power and performance metrics of Integrated Circuit (IC) technology. For specific applications like Space electronics, Implanted Biomedical, Sensor devices etc. drastic scaling has resulted in increasing the susceptibility of the nanoscale circuits to radiation effects. The objective of the paper is to provide an overview of the radiation hardening techniques at various levels of IC design and development, i.e. at Device Structure-Fabrication process (Radiation Hardening by Process) and Circuit and layout design (Radiation Hardening by Design), to mitigate the effects of radiation and improve reliability. The work also presents comparison of next generation device structure that utilize Carbon Nano Tubes (CNTs) and Semiconductor NanoWires (GAA-Si, GaAs, InN) against traditional MOSFET based device structures for operation under the radiation environment.