Effects of molding temperature on delamination of small outline transistor (SOT)

Abstract

Abstract Delamination of small outline transistor (SOT) package has been a challenge to ensure good package reliability. Molding process parameter optimization is a practical & cost-effective alternative to reduce delamination of the plastic package. First, selective molding parameters, namely, molding temperature, transfer speed, transfer pressure & pre-heat temperature was varied in a full factorial experiment to determine the significance of each factor. It is observed from the complete factorial analysis that molding temperature was the most significant factor concerning delamination. Next, one factor at a time (OFAT) experimental design was conducted to confirm moulding temperature’s repeatability. Molding temperature was identified as a significant factor on determining the delamination response of SOT packages. Lowering mold temperature resulting to lower percentage of delamination however proven to have an adverse on package curing density.