Optimization of process parameter variations for 16nm DG-FinFET using Response Surface Methodology-Central Composite Design

Abstract

Abstract A 16 nm double-gate FinFET (DG-FinFET) designed are optimized with a mathematical modelling using a response surface method-central composite design (RSM-CCD), with the relationship between parameters and output responses are investigated and examined. The threshold voltage (VTH), drive current (ION), leakage current (IOFF) and subthreshold swing (SS) ramifications towards the adjustment of six process parameter that integrates polysilicon doping dose, polysilicon doping tilt, Source/Drain doping dose, Source/Drain doping tilt, VTH doping dose and VTH doping tilt is studied using the RSM-CCD using half-factorial of 86 experimental runs, which totals to 52 runs, consisting of 8 centre points, 12 axial points, and 32 factorials. Ultimately, the VTH after the result is optimized with RSM-CCD showcased an improvement at 0.1785 V, with IOFF achieved at 958.71 pA/μm despite performing less favourably after optimized. That said, an improvement towards ION/IOFF ratio at 2.049×106 compared to 1.666×106 proves that both optimization techniques have met the predictions of International Technology Roadmap for Semiconductors (ITRS) 2013.