Developments of two 4 × 10 Gb/s VCSEL array drivers in 65 nm CMOS for HEP experiments-Reference-Cited by-同舟云学术

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Developments of two 4 × 10 Gb/s VCSEL array drivers in 65 nm CMOS for HEP experiments

Published:2017-02-21 Issue:02 Volume:12 Page:C02065-C02065
ISSN:1748-0221
Container-title:Journal of Instrumentation
language:
Short-container-title:J. Inst.

Author:

Guo D.,Gong D.,Xiang A.C.,Moreira P.,Kulis S.,Chen J.,Hou S.,Liu C.,Liu T.,Prosser A.,He H.,Sun Q.,Wang J.,Yang D.,Ye J.,Zhou W.

Publisher

IOP Publishing

Subject

Mathematical Physics,Instrumentation

Link

http://stacks.iop.org/1748-0221/12/i=02/a=C02065/pdf

Reference16 articles.

1. The versatile link, a common project for super-LHC

Cited by 8 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A CMOS Current-Mode Vertical-Cavity-Semiconductor-Emitting-Laser Diode Driver for Short-Range LiDAR Sensors;Sensors;2024-05-29

2. A 14-Gb/s VCSEL Driver in 65-nm CMOS With a Power-Efficient Driving Structure for Particle Physics Experiments;IEEE Transactions on Nuclear Science;2023-06

3. A 20 Gbps PAM4 VCSEL driving ASIC for detector front-end readout;Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment;2022-09

4. A 25 Gbps VCSEL driving ASIC: an attempt for ultra-high-speed front-end readout applications;Journal of Instrumentation;2022-01-01

5. A novel quad-channel 10 Gbps CMOS VCSEL array driver with integrated charge pumps;Journal of Instrumentation;2020-12-09

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