Author:
Huang X.,Gong D.,Guo D.,Hou S.,Huang G.,Kulis S.,Liu C.,Liu T.,Moreira P.,Rodríguez A. Sánchez,Sun H.,Sun Q.,Troska J.,Xiao L.,Zhang L.,Zhang W.,Ye J.
Abstract
We present a novel design and the test results of a 4-channel driver for an array of Vertical-Cavity Surface-Emitting Lasers (VCSELs). This ASIC, named cpVLAD and fabricated in a 65 nm CMOS technology, has on-chip charge pumps and is for data rates up to 10 Gbps per channel. The charge pumps are implemented to address the issue of voltage margin of the VCSEL driving stage in the applications under low temperature and harsh radiation environment. Test results indicate that cpVLAD is capable of driving VCSELs with forward voltages of up to 2.8 V using 1.2 V and 2.5 V power supplies with a power consumption of 94 mW/channel.
Subject
Mathematical Physics,Instrumentation
Reference19 articles.
1. The high-luminosity upgrade of the LHC: physics and technology challenges for the accelerator and the experiments,;J. Phys. Conf. Ser.,2016
2. A 10 Gb/s laser driver in 130 nm CMOS technology for high energy physics applications;JINST,2015
3. LDQ10: a compact ultra low-power radiation-hard 4 × 10 Gb/s driver array;JINST,2017
4. Summary of the effects of radiation upon the passive optical components of the Versatile Link;JINST,2014
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