Single-Event-Hardened Timing Generator for waveform digitizer based readout electronics
Author:
Publisher
IOP Publishing
Subject
Mathematical Physics,Instrumentation
Link
https://iopscience.iop.org/article/10.1088/1748-0221/14/06/C06021/pdf
Reference10 articles.
1. Gigahertz waveform sampling and digitization circuit design and implementation
2. Application of the DRS chip for fast waveform digitizing
3. Single-Event-Hardened All-Digital Delay Generator for FPGA-Based Implementation of a TDC-based readout electronics
4. A 0.6 V Low-Power Wide-Range Delay-Locked Loop in 0.18 $\mu$m CMOS
5. Clock aligner based on delay locked loop with double edge synchronization
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