New design of an RSFQ parallel multiply–accumulate unit-Reference-Cited by-同舟云学术

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New design of an RSFQ parallel multiply–accumulate unit

Published:2006-03-16 Issue:5 Volume:19 Page:S381-S386
ISSN:0953-2048
Container-title:Superconductor Science and Technology
language:
Short-container-title:Supercond. Sci. Technol.

Author:

Kataeva Irina,Engseth Henrik,Kidiyarova-Shevchenko Anna

Publisher

IOP Publishing

Subject

Materials Chemistry,Electrical and Electronic Engineering,Metals and Alloys,Condensed Matter Physics,Ceramics and Composites

Reference10 articles.

1. Superconducting multiuser detector for 3G base stations

2. RSFQ logic/memory family: a new Josephson-junction technology for sub-terahertz-clock-frequency digital systems

3. A 70-MHz 8-bit×8-bit parallel pipelined multiplier in 2.5-μm CMOS

4. Time-Delay Optimization of RSFQ Cells

Cited by 11 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. An 8-b Multiplier Using Single-Stage Full Adder Cell in Single-Flux-Quantum Circuit Technology;IEEE Transactions on Applied Superconductivity;2021-09

2. Comparative Analysis of Rapid Single Flux Quantum (RSFQ) Circuit Technique Multipliers;Lecture Notes in Electrical Engineering;2021

3. 32-Bit 4 × 4 Bit-Slice RSFQ Matrix Multiplier;IEEE Transactions on Applied Superconductivity;2018-10

4. Digital Processing;digital Encyclopedia of Applied Physics;2016-07-15

5. RSFQ 4-bit Bit-Slice Integer Multiplier;IEICE Transactions on Electronics;2016

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