Ultra-scaled MoS2 transistors and circuits fabricated without nanolithography

Author:

Ashokbhai Patel KishanORCID,Grady Ryan WORCID,Smithe Kirby K HORCID,Pop EricORCID,Sordan RomanORCID

Abstract

Abstract The future scaling of semiconductor devices can be continued only by the development of novel nanofabrication techniques and atomically thin transistor channels. Here we demonstrate ultra-scaled MoS2 field-effect transistors (FETs) realized by a shadow evaporation method which does not require nanofabrication. The method enables large-scale fabrication of MoS2 FETs with fully gated  ∼10 nm long channels. The realized ultra-scaled MoS2 FETs exhibit very small hysteresis of current–voltage characteristics, high drain currents up to  ∼560 A m−1, very good drain current saturation for such ultra-short devices, subthreshold swing of ∼120 mV dec−1, and drain current on/off ratio of ∼106 in air ambient. The fabricated ultra-scaled MoS2 FETs are also used to realize logic gates in n-type depletion-load technology. The inverters exhibit a voltage gain of  ∼50 at a power supply voltage of only 1.5 V and are capable of in/out signal matching.

Funder

H2020 Graphene Flagship Core 2

Publisher

IOP Publishing

Subject

Mechanical Engineering,Mechanics of Materials,Condensed Matter Physics,General Materials Science,General Chemistry

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