Threshold voltage modelling and gate oxide thickness effect on polycrystalline silicon thin-film transistors
Author:
Publisher
IOP Publishing
Subject
Condensed Matter Physics,Mathematical Physics,Atomic and Molecular Physics, and Optics
Link
http://stacks.iop.org/1402-4896/76/i=6/a=006/pdf
Reference24 articles.
1. Chemical and biological sensors using polycrystalline silicon TFTs
2. Gate Length Dependence of Hot Carrier Reliability in Low-Temperature Polycrystalline-Silicon P-Channel Thin Film Transistors
3. Model for the above‐threshold characteristics and threshold voltage in polycrystalline silicon transistors
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3. Gravure printed low voltage polymer transistors and inverters;Thin Solid Films;2013-12
4. An Analytical Expression for Threshold Voltage of Polycrystalline-Silicon Thin-Film Transistors;IEEE Electron Device Letters;2010-08
5. Simulation of Nanoscale Two-Bit Not-And-type Silicon–Oxide–Nitride–Oxide–Silicon Nonvolatile Memory Devices with a Separated Double-Gate Fin Field Effect Transistor Structure Containing Different Tunneling Oxide Thicknesses;Japanese Journal of Applied Physics;2009-06-22
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