Modeling of high permittivity insulator structure with interface charge by charge compensation

Abstract

An analytical model of the power metal–oxide–semiconductor field-effect transistor (MOSFET) with high permittivity insulator structure (HKMOS) with interface charge is established based on superposition and developed for optimization by charge compensation. In light of charge compensation, the disturbance aroused by interface charge is efficiently compromised by introducing extra charge for maximizing breakdown voltage (BV) and minimizing specific ON-resistance (R on,sp). From this optimization method, it is very efficient to obtain the design parameters to overcome the difficulty in implementing the R on,sp–BV trade-off for quick design. The analytical results prove that in the HKMOS with positive or negative interface charge at a given length of drift region, the extraction of the parameters is qualitatively and quantitatively optimized for trading off BV and R on,sp with JFET effect taken into account.