Impact of symmetric gate-recess length on the DC and RF characteristics of InP HEMTs

Abstract

Abstract We fabricated a set of symmetric gate-recess devices with gate length of 70 nm. We kept the source-to-drain spacing (L SD) unchanged, and obtained a group of devices with gate-recess length (L recess) from 0.4 μm to 0.8 μm through process improvement. In order to suppress the influence of the kink effect, we have done SiN X passivation treatment. The maximum saturation current density (I D_max) and maximum transconductance (g m,max) increase as L recess decreases to 0.4 μm. At this time, the device shows I D_max=749.6 mA/mm at V GS=0.2 V, V DS=1.5 V, and g m_max=1111 mS/mm at V GS=−0.35 V, V DS=1.5 V. Meanwhile, as L recess increases, it causes parasitic capacitance C gd and g d to decrease, making f max drastically increases. When L recess = 0.8 μm, the device shows f T=188 GHz and f max=1112 GHz.