Device physics and design of FD-SOI JLFET with step-gate-oxide structure to suppress GIDL effect*

Author:

Wang Bin,Shi Xin-Long,Zhang Yun-Feng,Chen Yi,Hu Hui-Yong,Wang Li-Ming

Abstract

A novel n-type junctionless field-effect transistor (JLFET) with a step-gate-oxide (SGO) structure is proposed to suppress the gate-induced drain leakage (GIDL) effect and off-state current I off. Introducing a 6-nm-thick tunnel-gate-oxide and maintaining 3-nm-thick control-gate-oxide, lateral band-to-band tunneling (L-BTBT) width is enlarged and its tunneling probability is reduced at the channel--drain surface, leading the off-state current I off to decrease finally. Also, the thicker tunnel-gate-oxide can reduce the influence on the total gate capacitance of JLFET, which could alleviate the capacitive load of the transistor in the circuit applications. Sentaurus simulation shows that I off of the new optimized JLFET reduced significantly with little impaction on its on-state current I on and threshold voltage V TH becoming less, thus showing an improved I on/I off ratio (5 × 104) and subthreshold swing (84 mV/dec), compared with the scenario of the normal JLFET. The influence of the thickness and length of SGO structure on the performance of JLFET are discussed in detail, which could provide useful instruction for the device design.

Publisher

IOP Publishing

Subject

General Physics and Astronomy

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