Organic field-effect transistor floating-gate memory using polysilicon as charge trapping layer

Abstract

In this study, we present an organic field-effect transistor floating-gate memory using polysilicon (poly-Si) as a charge trapping layer. The memory device is fabricated on a N+–Si/SiO2 substrate. Poly-Si, polymethylmethacrylate, and pentacene are used as a floating-gate layer, tunneling layer, and active layer, respectively. The device shows bidirectional storage characteristics under the action of programming/erasing (P/E) operation due to the supplied electrons and holes in the channel and the bidirectional charge trapping characteristic of the poly-Si floating-gate. The carrier mobility and switching current ratio (I on/I off ratio) of the device with a tunneling layer thickness of 85 nm are 0.01 cm 2 · V − 1 · s − 1 and 102, respectively. A large memory window of 9.28 V can be obtained under a P/E voltage of ±60 V.