A Low Specific on-Resistance SOI Trench MOSFET with a Non-Depleted Embedded p-Island
Author:
Publisher
IOP Publishing
Subject
General Physics and Astronomy
Link
https://iopscience.iop.org/article/10.1088/0256-307X/30/7/078501/pdf
Reference15 articles.
1. A low on-resistance triple RESURF SOI LDMOS with planar and trench gate integration
2. A 50–60 V Class Ultralow Specific on-Resistance Trench Power MOSFET
3. Improving Breakdown Behavior by Substrate Bias in a Novel Double Epi-layer Lateral Double Diffused MOS Transistor
4. SOI RESURF LDMOS transistor using trench filled with oxide
Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. A Novel Interface-Gate Structure for SOI Power MOSFET to Reduce Specific On-Resistance;Chinese Physics Letters;2015-09
2. Ultralow specific on-resistance high voltage trench SOI LDMOS with enhanced RESURF effect;Journal of Semiconductors;2015-02
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