A novel high speed impact testing method for evaluating the low temperature effects of eutectic and lead‐free solder joints
Author:
Liu De‐Shin,Hsu Chang‐Lin,Kuo Chia‐Yuan,Huang Ya‐Ling,Lin Kwang‐Lung,Shen Geng‐Shin
Abstract
PurposeThe purpose of this paper is to present a novel high speed impact testing method for evaluating the effects of low temperatures on eutectic and lead‐free solder joints. Interfacial cracking failure of Sn‐based and Pb‐free solders at subzero temperatures is of significant concern for electronic assemblies that operate in harsh environments.Design/methodology/approachThis paper presents a newly designed low temperature control system coupled with an Instron micro‐impact testing machine, which offers a package level test for solder bumps, and that is used at subzero temperature ranges as low as −40°C. This study examined the failure characteristics of 63Sn‐37Pb (Sn37Pb) and 96.5Sn‐3Ag‐0.5Cu (SAC305) solder joints at temperatures ranging from room temperature (R.T.) to −40°C, and at impact speeds of 1 m/s.FindingsThree types of failure mode were identified: M1 interfacial fracture with no residual solder remaining on the pad (interfacial cracking); M2 interfacial fracture with residual solder persisting on the pad (mixed mode failure); and M3 solder ball fracture (bulk solder cracking). The experimental results indicated that the energy to peak load for both types of solders decreased significantly, by approximately 35 percent to 38 percent when the test temperature was reduced from R.T. to −40°C. In addition, the peak load of the Sn37Pb solder joint increased noticeably with a decreasing test temperature. However, the peak load of the SAC305 specimen remained virtually unchanged with a reduction in the temperature. The Sn37Pb solder joints failed in an M3 failure mode under all the considered testing temperatures. The SAC305 solder joints displayed both M1 and M2 failure modes at R.T.; however, they failed almost exclusively in M1 mode at the lowest test temperature of −40°C.Originality/valueThis paper presents a novel technique for evaluating high‐speed impact strength and energy absorbance of Sn‐based and Pb‐free solders at the chip level within a low temperature control system. To overcome the drawbacks experienced in other studies, this study focused specifically on cryo‐impact testing systems and the performed experimental steps to improve the accuracy of post‐test analysis.
Subject
Electrical and Electronic Engineering,Condensed Matter Physics,General Materials Science,Electrical and Electronic Engineering,Condensed Matter Physics,General Materials Science
Reference20 articles.
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