Author:
Chowdhury Joy,Sarkar Angsuman,Mahapatra Kamalakanta,Das Jitendra Kumar
Abstract
Purpose
The purpose of this paper is to present an improved model based on center potential instead of surface potential which is physically more relevant and accurate. Also, additional analytic insights have been provided to make the model independent and robust so that it can be extended to a full range compact model.
Design/methodology/approach
The design methodology used is center potential based analytical modeling using Psuedo-2D Poisson equation, with ingeniously developed boundary conditions, which help achieve reasonably accurate results. Also, the depletion width calculation has been suitably remodeled, to account for proper physical insights and accuracy.
Findings
The proposed model has considerable accuracy and is able to correctly predict most of the physical phenomena occurring inside the broken gate Tunnel FET structure. Also, a good match has been observed between the modeled data and the simulation results. Ion/Iambipolar ratio of 10^(−8) has been achieved which is quintessential for low power SOCs.
Originality/value
The modeling approach used is different from the previously used techniques and uses indigenous boundary conditions. Also, the current model developed has been significantly altered, using very simple but intuitive technique instead of complex mathematical approach.
Subject
Electrical and Electronic Engineering,Industrial and Manufacturing Engineering
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