Quantification of Thermal Fluctuation Behavior in Chip on Wafer Process by Thermo-fluid Analysis
Author:
Affiliation:
1. Manufacturing Technology and Engineering Division, Panasonic Corporation
2. Graduate School of Engineering, Osaka University
3. Panasonic Smart Factory Solutions Co.,Ltd.
Publisher
Sumart Processing Society for Minerals, Environment and Energy
Link
https://www.jstage.jst.go.jp/article/jspmee/8/2/8_65/_pdf
Reference13 articles.
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2. M. Brunnbauer, T. Meyer, G. Ofner, K. Mueller, R. Hagen: Embedded Wafer Level Ball Grid Array (eWLB), 33rd IEEE/CPMT International Electronics Manufacturing Technology Conference (IEMT)(, 2008)1-6.
3. Curtis Zwenger et al.: Electrical and Thermal Simulation of SWIFT ™ High-density Fan-out PoP Technology, IEEE 67th Electronic Components and Technology Conference(, 2017)1962-1967.
4. D. Hiner et al.: SLIM ™ Advanced Fan-out Packaging for High Performance Multi-die Solutions, IEEE 67th Electronic Components and Technology Conference(, 2017)575-580.
5. N. Motohashi, T. Kimura, K. Mineo, Y. Yamada, T. Nishiyama, et al.: System in wafer-level package technology with RDL-first process, Electronic Components and Technology Conference(ECTC), 2011 IEEE 61st(, 2011)59-64.
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