Strained Silicon Layer in CMOS Technology

Abstract

Semiconductor industry is currently facing with thefact that conventional submicron CMOS technology isapproaching the end of their capabilities, at least when it comes toscaling the dimensions of the components. Therefore, muchattention is paid to device technology that use new technologicalstructures and new channel materials. Modern technologicalprocesses, which mainly include ultra high vacuum chemicalvapor deposition, molecular beam epitaxy and metal-organicmolecular vapor deposition, enable the obtaining of ultrathin,crystallographically almost perfect, strained layers of high purity.In this review paper we analyze the role that such layers have inmodern CMOS technologies. It’s given an overview of thecharacteristics of both strain techniques, global and local, withspecial emphasis on performance of NMOS biaxial strain andPMOS uniaxial strain. Due to the improved transport propertiesof strained layers, especially high mobility of charge carriers, theemphasis is on mechanisms to increase the charge mobility ofstrained silicon and germanium, in light of recent developments inCMOS technology.