Design of a Low Power CMOS Inverter with the VBB Stack Approach

Author:

Khmailia S.,Rouabeh J.,Mami A.

Abstract

Due to the exponential advancement in nanotechnology devices, low energy consumption has become a significant concern of researchers and VLSI designers. In this paper, the Variable body bias (VBB) and the stack approach are used simultaneously to reduce the leakage power of a CMOS inverter in standby mode. This new technique is called the VBB stack approach. The simulations have been conducted on the LT spice simulator. The power evaluation has been determined and compared between the conventional approach, the stack approach, and the VBB stack approach. The results have demonstrated the performance of the VBB stack approach. The power consumption in the VBB stack approach has decreased by 23% compared to the conventional approach and by 10% compared to the stack approach.

Publisher

Engineering, Technology & Applied Science Research

Subject

General Medicine

Cited by 3 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Optimization of Leakage Power Dissipation in CMOS Inverter using Self biased and W/L Scaling Techniques;2023 2nd International Conference on Futuristic Technologies (INCOFT);2023-11-24

2. Exploring Low-Power Implementation Techniques for 2:1 MUX Using Conventional and CNTFET Technology: a Performance Comparison;2023 14th International Conference on Computing Communication and Networking Technologies (ICCCNT);2023-07-06

3. Design and Implementation of Optimized Low Power Pre-Charge Sense Amplifier;2023 International Conference on Computational Intelligence and Sustainable Engineering Solutions (CISES);2023-04-28

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