A Novel Design of a Multiplier Using Reversible Ternary Gates-Reference-Cited by-同舟云学术

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A Novel Design of a Multiplier Using Reversible Ternary Gates

Published:2019-01-30 Issue:6 Volume:67 Page:744-753
ISSN:0377-2063
Container-title:IETE Journal of Research
language:en
Short-container-title:IETE Journal of Research

Author:

Panahi Mohammad Mehdi¹,Hashemipour Omid²^ORCID,Navi Keivan²³

Affiliation:

1. Department of Computer Engineering, Science and Research Branch, Islamic Azad University, Tehran, Iran

2. Faculty of Electrical & Computer Engineering, Shahid Beheshti University, G. C., Tehran, Iran

3. School of Computer Science Institute for Research in Fundamental Sciences (IPM), Tehran, Iran

Publisher

Informa UK Limited

Subject

Electrical and Electronic Engineering,Computer Science Applications,Theoretical Computer Science

Link

https://www.tandfonline.com/doi/pdf/10.1080/03772063.2019.1567274

Reference28 articles.

1. Designing novel reversible BCD adder and parallel adder/subtraction using new reversible logic gates

2. Novel 8-bit reversible full adder/subtractor using a QCA reversible gate

3. Irreversibility and Heat Generation in the Computing Process

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1. Efficient realization of quantum balanced ternary reversible multiplier building blocks: A great step towards sustainable computing;Sustainable Computing: Informatics and Systems;2023-12

2. Quaternary Reversible Circuit Optimization for Scalable Multiplexer and Demultiplexer;IEEE Access;2023

3. Novel qutrit circuit design for multiplexer, De-multiplexer, and decoder;Quantum Information Processing;2022-12-09

4. Ternary logic design in topological quantum computing;Journal of Physics A: Mathematical and Theoretical;2022-07-11

5. Pair-Wise Urdhava-Tiryagbhyam (UT) Vedic Ternary multiplier;Microelectronics Journal;2022-01

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