A current-mode multi-valued adder circuit for multi-operand addition
Author:
Publisher
Informa UK Limited
Subject
Electrical and Electronic Engineering
Link
http://www.tandfonline.com/doi/pdf/10.1080/00207217.2011.567039
Reference14 articles.
1. Feature - Power-aware design techniques for nanometer MOS current-mode logic gates: a design framework
2. Ike, T. Hanyu, T., and Kameyama, M. (2002), ‘Fully Source-Coupled Logic Based Multiple-Valued VLSI’, inISMVL 2002, 32nd IEEE International Symposium on Multiple-Valued Logic, pp. 270–275
3. CMOS multiple-valued logic design. I. Circuit implementation
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