Ultra-low-power carbon nanotube FET-based quaternary logic gates
Author:
Publisher
Informa UK Limited
Subject
Electrical and Electronic Engineering
Link
http://www.tandfonline.com/doi/pdf/10.1080/21681724.2016.1138506
Reference21 articles.
1. On modelling and characterization of single electron transistor
2. A current-mode multi-valued adder circuit for multi-operand addition
3. A novel Voltage-mode CMOS quaternary logic design
4. Deng, J. (2007).Device modeling and circuit performance evaluation for nanoscale devices: silicon technology beyond 45 nm node and carbon nanotube field effect transistors(Doctoral dissertation). Stanford University, California.
5. High-performance noise-tolerant circuit techniques for CMOS dynamic logic
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1. A novel quaternary inward inverter gate based on MIN and MAX functions;International Journal of Electronics;2024-09-08
2. Energy-efficient design of quaternary logic gates and arithmetic circuits using hybrid CNTFET-RRAM technology;Physica Scripta;2024-07-22
3. Novel design of power-efficient quaternary logic gates using CNTFET;International Journal of Electronics;2023-05-14
4. A Novel Low-Complexity Power-Efficient Design of Standard Ternary Logic Gates using CNTFET;2023 International Conference on Computer, Electrical & Communication Engineering (ICCECE);2023-01-20
5. Novel Mode Changing Features in the Design of Quaternary Logic Gates using CNTFET;2022 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON);2022-11-26
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