On-chip supply noise in multiprocessors: impact and clock gating inspired mitigation strategies-Reference-Cited by-同舟云学术

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On-chip supply noise in multiprocessors: impact and clock gating inspired mitigation strategies

Published:2022-12-28 Issue: Volume: Page:1-20
ISSN:0020-7217
Container-title:International Journal of Electronics
language:en
Short-container-title:International Journal of Electronics

Author:

Bhattacharjee Pritam¹^ORCID,Trivedi Gaurav²^ORCID,Majumder Alak³^ORCID

Affiliation:

1. School of Computing, Amrita Vishwa Vidyapeetham, Kerala, India

2. Department of Electrical & Electronics Engineering, Indian Institute of Technology (IIT), Guwahati, Assam, India

3. Department of Electronics & Communication Engineering, National Institute of Technology (NIT), Arunachal Pradesh, India

Funder

SERB CRG Project

Publisher

Informa UK Limited

Subject

Electrical and Electronic Engineering

Link

https://www.tandfonline.com/doi/pdf/10.1080/00207217.2022.2158493

Reference58 articles.

1. Saving power by synthesizing gated clocks for sequential circuits

2. Validating the intel pentium 4 microprocessor

3. Scalable model for predicting the effect of negative bias temperature instability for reliable design

4. A 90 nm leakage control transistor based clock gating for low power flip flop applications

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