Wide division ratio range programmable frequency divider with close-to-50% output duty-cycle

Author:

Wu Jianhui,Wang Shengyang,Huang Fuqing

Publisher

Informa UK Limited

Subject

Electrical and Electronic Engineering

Reference11 articles.

1. A wideband sigma-delta phase-locked-loop modulator for wireless applications

2. A 1.75-GHz/3-V dual-modulus divide-by-128/129 prescaler in 0.7-μm CMOS

3. A 5.3-GHz programmable divider for HiPerLAN in 0.25-/spl mu/m CMOS

4. A 1.5-V 900-MHz monolithic CMOS fast-switching frequency synthesizer for wireless applications

5. McCorquodale, MS. Pernia, S.M., Kubba, S., Carichner, G., O’ Day, J.D., Marsman, E., Kuhn, J., and Brown, R.B. (2008), ‘A 0.5-480 MHz Self-referenced CMOS Clock Generator with 90 ppm Total Frequency Error and Spread Spectrum Capability’, inIEEE International Solid-State Circuits Conference (ISSCC)Digital Technical Papers, 350–351, 619

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