A high-resolution time-to-digital converter using a three-level resolution
Author:
Funder
National Natural Science Foundation of China
Publisher
Informa UK Limited
Subject
Electrical and Electronic Engineering
Link
http://www.tandfonline.com/doi/pdf/10.1080/00207217.2015.1092599
Reference27 articles.
1. A new low-power and low-complexity all digital PLL (ADPLL) in 180nm and 32nm
2. A Vernier Time-to-Digital Converter With Delay Latch Chain Architecture
3. Brok, V. D. (2012).Design and implementation of an Analog-to-Time-to-Digital converter(M.Sc Thesis). University of Twente, Netherlands.
4. A time-to-digital converter using multi-phase-sampling and time amplifier for all digital phase-locked loop
5. A Time-to-Digital Converter Based on a Multiphase Reference Clock and a Binary Counter With a Novel Sampling Error Corrector
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