Carrier trapping and recombination at copper-decorated grain boundaries in silicon
Author:
Affiliation:
1. a Groupe de Physique des Solides , Université de Paris VII , 2 place Jussieu, 75251 , Paris , Cedex 05 , France
Publisher
Informa UK Limited
Subject
General Physics and Astronomy,General Chemical Engineering
Link
https://www.tandfonline.com/doi/pdf/10.1080/13642819208220127
Reference16 articles.
1. The Influence of Structure and Impurity Precipitation on the Electrical Properties of the Grain Boundaries in Silicon: Copper Precipitation in the Σ = 25 Boundary
2. Measurement of the grain-boundary states in semiconductors by deep-level transient spectroscopy
3. The electronic properties of copper-decorated twinned boundaries in silicon
4. Electronic processes at grain boundaries in polycrystalline semiconductors under optical illumination
5. Electron microscope study of electrically active impurity precipitate defects in silicon
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