Interface potential barrier height and leakage current behavior of Pt/(Ba, Sr)TiO3/Pt capacitors fabricated by sputtering process-Reference-Cited by-同舟云学术

Interface potential barrier height and leakage current behavior of Pt/(Ba, Sr)TiO3/Pt capacitors fabricated by sputtering process

Published:1996-11 Issue:1-3 Volume:13 Page:157-177
ISSN:1058-4587
Container-title:Integrated Ferroelectrics
language:en
Short-container-title:Integrated Ferroelectrics

Author:

Hwang Cheol Seong¹,Lee Byoung Taek¹,Park Soon Oh¹,Kim Jin Won¹,Cho Hag-Ju¹,Kang Chang Seok¹,Horii Hideki¹,Lee Sang In¹,Lee Moon Yong¹

Affiliation:

1. a Samsung Electronics, Co., Semiconductors R & D Center, Memory Process Development Team 2 , San # 24, Nosgseo-Lee, Kiheung-Eup, Yongin-Gun, Kyungki-Do, 449-900 , Korea

Publisher

Informa UK Limited

Subject

Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Ceramics and Composites,Control and Systems Engineering,Electronic, Optical and Magnetic Materials

Link

https://www.tandfonline.com/doi/pdf/10.1080/10584589608013090

Reference23 articles.

1. Giga-bit scale DRAM cell with new simple Ru/(Ba,Sr)TiO/sub 3//Ru stacked capacitors using X-ray lithography

2. Preparation of Lead Zirconate Titanate Thin Films by Reactive Evaporation

3. Current-Voltage Characteristics of Electron-Cyclotron-Resonance Sputter-DepositedSrTiO3Thin Films

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